Generally speaking, a communication system is composed of a transmission means (e.g., transmitter) that transmits a signal, a “medium” through which the signal is transmitted and a reception means (e.g., receiver) for receiving the transmitted signal. As is known in the art, the medium may take any one of a number of physical forms, such as a copper wire, coaxial cable or in the case of wireless transmission, the air. A word used synonymous with “medium” is “transmission channel” or “channel” for short. FIG. 1 depicts a generalized communication system 1. As shown, a transmission means (abbreviated “Tx”) 2 transmits an analog waveform signal containing information through a wired channel 3 to a reception means 4 (abbreviated “Rx”). As is also known in the art, the analog waveform signal may be transmitted through the channel 3 at varying speeds ranging from a few kilobits per second to many gigabits per second (abbreviated “Gb/s”).
So-called high speed, serial data link systems involve the transmission of signals at speeds of 6 Gb/s and beyond. At such speeds, “equalization” techniques are needed, typically at the reception means or receiving end of the channel, to correct for the degradation of the signal as it passes through the channel 3 due to physical phenomena commonly referred to as channel loss, reflection, cross talk, and noise to name a few. In general, equalization involves the removal or “filtering” out of undesirable components of a signal that lead to the signal's degradation, components that were added by the phenomena discussed above as well as others.
In the high-speed, serial data link industry, standards have been promulgated that govern the type of equalization measurements to be applied. One such standard is that promulgated by the SAS-2, 6G standards committee. The standard involves an equalization method using a so-called “training sequence”. A training sequence is used to, generally speaking, adjust an equalization filter so that it can correctly remove undesirable signal components from digitized samples of a received analog waveform signal. Typically, a training sequence is derived from digitized samples (e.g., bits) of a received signal.
Determining the training sequence associated with digitized samples of a given analog waveform signal is not a trivial matter, however. U.S. Non-Provisional patent application Ser. No. 12/423,604 mentioned above sets forth various methods and systems (referred to as “equalization simulators”) for determining the training sequence of a signal in a high-speed, serial data link system using a real-time or sampling oscilloscope. Before a so-determined training sequence can be used to remove degradations from the signal, however, it must be aligned with re-sampled, digitized samples of the received analog waveform signal. U.S. Non-Provisional patent application Ser. No. 12/423,604 discloses techniques for doing so.
In effect, the use of a training sequence identifies those components of an original, analog waveform signal that must be removed or otherwise adjusted to correct for the effects of signal degradations. What remains is to actually remove or adjust such components by an appropriate, estimated amount. To do so, additional equalization or filtering is required.
A well-known technique for removing signal degradations, especially those caused by Inter-Symbol interference (ISI) due to channel insertion loss and reflections, or noise from crosstalk and other sources, is the non-linear, decision feedback equalizer (DFE). As is known in the art, a DFE uses proper values for so-called “tap coefficients” to effectively remove signal degradations. The values of the tap coefficients may be derived in part from a determined training sequence. The process of finding the proper values for “tap coefficients” in a DFE is referred to as an equalizer adaptation process. A DFE's tap coefficient values may be adapted to different values on different channels that cause different signal degradations. The behavior of a model DFE as set forth in the PCI Express or Peripheral Component interconnect Express 3.0 specification (sometimes referred to as “PCIE 3.0” for short) is shown in FIG. 2. One form of a DFE that has been implemented in accordance with the model DFE shown in FIG. 2 to determine tap coefficients uses a so-called “exhaustive search” process. However, the inventor has found that this form of a DFE does not yield precise results and is computationally inefficient because it requires the analysis of many data points.
Accordingly, one objective of the present invention is to provide methods and systems that are more precise and computationally efficient in order to optimize the performance of DFEs used in a high-speed serial data link.
Another objective of the present invention is to provide methods and systems that optimize the performance of DFEs used in a high-speed serial data link by identifying optimal DFE tap values.
Yet another objective of the present invention is to provide methods and systems that optimize the performance of DFEs used in a high-speed serial data link by identifying optimal DFE tap values, where the optimized DFEs also comply with the behavior of a model DFE set forth in PCIE 3.0.
Other objectives and their related advantages provided by the present invention will be apparent from the text which follows along with the associated figures, read in conjunction with the appended claims.